Light emitting device and manufacture method thereof

ABSTRACT

The present disclosure provides a method for forming a light-emitting apparatus, comprising providing a first board having a plurality of first metal contacts, providing a substrate, forming a plurality of light-emitting stacks and trenches on the substrate, wherein the light-emitting stacks are apart from each other by the plurality of the trenches, bonding the light-emitting stacks to the first board, forming an encapsulating material commonly on the plurality of the light-emitting stacks, and cutting the first board and the encapsulating material to form a plurality of chip-scale LED units.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a continuation-in-part of U.S. patent applicationSer. No. 11/674,371, filed Feb. 13, 2007, now abandoned, which is acontinuation-in-part of U.S. patent application Ser. No. 11/249,680,filed Oct. 12, 2005, now U.S. Pat. No. 7,192,797, for which priority isclaimed under 35 U.S.C. §120, the disclosure of which is incorporatedherein by reference in its entirety, and this application claimspriority of Application No. 94103370, filed in Taiwan, R.O.C. on Feb. 3,2005, under 35 U.S.C. §119.

FIELD OF DISCLOSURE

The present disclosure relates to a light emitting device and a methodfor manufacturing the same. In addition, the present disclosure relatesto a light emitting device array and a method for manufacturing thesame.

BACKGROUND OF THE DISCLOSURE

For conventional light emitting device (LED) packages, a LED chip ismounted onto the sub-mount using the epoxy put thereon to form a LEDelement, and the process is called “Die Bonding”. Typically, the epoxyused in “Die Bonding” can be silver filled epoxy or other non-conductiveresin. Then, the LED elements are assembled onto the circuit board. Fora flip-chip LED, the p-type conductive layer and the n-type conductivelayer are exposed on the same side to have the positive electrode andthe negative electrode on the same side of the LED structure. And theLED structure with the positive electrode and the negative electrode isflipped and disposed on the solder without wire bonding. However,conventional flip-chip LEDs still require “Dicing” and “Die Bonding” forconnecting and mounting the circuit board. If the electrodes offlip-chip LEDs have large contact area to be directly connected to thecircuit board, a number of conventional packaging processes for LEDs canbe skipped.

The operating current of a conventional LED is typically several tens toseveral hundreds of mAs. Therefore, the brightness of a conventional LEDis not suitable for illumination purpose. When lots of LEDs areassembled into a LED lamp to improve the brightness, the volume of theLED lamp increases accordingly and results in the loss of its marketcompetitiveness. Therefore, to improve the brightness of a single LED isa necessary approach. However, as the LED advances towards highbrightness, the operating current and power of a single LED becomeseveral times to several hundred times than those that a conventionalLED requires. For example, the operating current of a high brightnessLED is about several hundreds of mAs to several Amps (A). As a result,the heat generated by the LED becomes an important issue. “Heat”seriously affects the performance of LEDs; for example, the thermaleffect influences the wavelength of lights emitted from the LED, reducesthe brightness of lights generated from the semiconductor device, anddamages the LED device. Therefore, how to dissipate heat generated bythe high power LED become the important issue of the LEDs.

US Applications Nos. 2004/0188696 and 2004/0203189 disclosed a LEDpackage and the method for manufacturing the same based on the SurfaceMount Technology (SMT). Each LED package includes a LED chip, and eachchip is flip-chip bonded onto a frontside of the sub-mount wafer usingboning bump. A plurality of arrays of openings is drilled into theelectrically insulating sub-mount wafer. A metal is applied to thedrilled openings to produce a plurality of via arrays. The p-type andn-type contacts of each flip-chip bonded LED electrically communicatewith a solderable backside of the sub-mount wafer through a via array. Athermal conduction path is provided for thermally conducting heat fromthe flip-chip bonded LED chip to the solderable backside of thesub-mount wafer. Subsequent to the flip-chip bonding, the sub-mountwafer is separated to produce the surface mount LED packages.

However in US Applications Nos. 2004/0188696 and 2004/0203189, itrequires drilled via array with filled metal within the sub-mount waferand thus increases the manufacturing cost. Furthermore, it becomescomplicated to flip-chip bond each chip onto the sub-mount wafer usingbonding bump. Therefore, it would be beneficial if the LED packages haveexcellent thermal conductive paths without the provision of thesub-mount wafers.

SUMMARY OF THE DISCLOSURE

The present disclosure provides a method for forming a light-emittingapparatus. The method comprises the steps of providing a first boardhaving a plurality of first metal contacts, providing a substrate,forming a plurality of light-emitting stacks and trenches on thesubstrate wherein the light-emitting stacks are apart from each other bythe plurality of the trenches, bonding the light-emitting stacks to thefirst board, forming an encapsulating material commonly on the pluralityof the light-emitting stacks, and cutting the first board and theencapsulating material to form a plurality of chip-scale LED units.

In one embodiment of the present disclosure, the method furthercomprises forming an opaque layer in the trench and enclosing thelight-emitting stacks for preventing the light emitted from neighboringlight-emitting stacks from mutually interfering or crosstalk.

In one embodiment of the present disclosure, the method furthercomprises selectively forming a first wavelength converting material ona first light-emitting stack and configured to convert the light emittedfrom the first light-emitting stack to a first light, selectivelyforming a second wavelength converting material on a secondlight-emitting stack and configured to convert the light emitted fromthe second light-emitting stack to a second light, and providing a thirdlight-emitting stack devoid of any wavelength converting material formedthereon, wherein the light emitted from the first, second, and thirdlight-emitting stacks is a blue light, and wherein the first light is agreen light, and the second light is a red light.

In one embodiment of the present disclosure, the method furthercomprises removing the substrate to expose a surface of thelight-emitting stacks after bonding the light-emitting stacks to thefirst board and roughening the exposed surface of the light-emittingstacks.

In one embodiment of the present disclosure, the method furthercomprises forming an underfill material substantially over the surfaceof the first board before bonding the light-emitting stacks to the firstmetal contacts.

In one embodiment of the present disclosure, the method furthercomprises providing a second board having a plurality of second metalcontacts, and bonding the plurality of chip-scale LED units to thesecond metal contacts of the second board.

BRIEF DESCRIPTION OF THE DRAWINGS

The foregoing aspects and many of the attendant advantages of thisdisclosure will become more readily appreciated as the same becomesbetter understood by reference to the following detailed description,when taken in conjunction with the accompanying drawings, wherein:

FIGS. 1A-1E illustrate cross-sectional views of forming a light emittingdevice (LED) in accordance with one embodiment of the presentdisclosure;

FIG. 1F illustrates LEDs in accordance with an embodiment of the presentdisclosure;

FIGS. 2A-2D illustrate cross-sectional views of forming a LED array inaccordance with one embodiment of the present disclosure;

FIG. 2E illustrates the LED array connected to the circuit board inaccordance with another embodiment of the present disclosure;

FIG. 2F illustrates a LED array having a first conductive layer with arough surface in accordance with one embodiment of the presentdisclosure;

FIG. 2G illustrates a LED array package in accordance with an embodimentof the present disclosure;

FIGS. 3A-3G illustrate one embodiment of a chip-scale RGB LED unit andthe manufacturing method thereof in accordance the present disclosure;

FIG. 4A is a top view of an LED array flip-bonded to a circuit boarddepicted in FIG. 3F;

FIG. 4B is a top view of a chip-scale RGB LED unit depicting in FIG. 3G;

FIG. 5A is a top view of an LED array flip-bonded to a circuit boarddepicted in accordance with another embodiment of the presentdisclosure;

FIG. 5B is a top view of a chip-scale LED unit in accordance with oneembodiment of the present disclosure;

FIG. 5C is a cross-sectional view of a chip-scale LED unit in accordancewith one embodiment of the present disclosure;

FIG. 5D is a top view of a chip-scale LED unit in accordance withanother embodiment of the present disclosure;

FIG. 5E is a cross-sectional view of the chip-scale LED unit depicted inFIG. 5D;

FIG. 6A illustrates a chip-scale RGB LED unit in accordance with anotherembodiment of the present disclosure;

FIG. 6B illustrates a chip-scale LED unit in accordance with anotherembodiment of the present disclosure;

FIG. 6C illustrates a chip-scale LED unit in accordance with anotherembodiment of the present disclosure;

FIG. 7A illustrates a display module in accordance with one embodimentof the present disclosure;

FIG. 7B illustrates a lighting module in accordance with one embodimentof the present disclosure; and

FIG. 8 illustrates a lighting apparatus in accordance with oneembodiment of the present disclosure.

DETAILED DESCRIPTION OF THE DISCLOSURE

FIGS. 1A-1E illustrate the method for forming a light emitting device(LED) according to one embodiment of the present disclosure. Referringto FIG. 1A, at first, a light emitting structure 100 is formed. Thelight emitting structure 100 includes a substrate 11, a first conductivelayer 102 as a cladding layer, an active layer 104 disposed on the layer102 as a light emitting layer, and a second conductive layer 106disposed on the active layer 104 as another cladding layer. Preferably,as shown in FIG. 1A, an electrode or bonding pad 107 a is disposed on anexposed portion of the layer 102, and another electrode or bonding pad107 b is disposed on the layer 106. The manufacture method and thematerial (e.g., Aluminum) of electrode or bonding pads 107 a and 107 bare well known to those skilled in the art and thus are omittedhereinafter. Furthermore, in one embodiment, the light emittingstructure 100 includes a passivation layer 120 to protect the lightemitting structure 100. Also, the manufacture method and the material(e.g., SiO₂) of passivation layer 120 are well known to those skilled inthe art and thus omitted hereinafter.

The first conductive layer 102 and the second conductive layer 106 canbe embodied as any semiconductor materials known to those skilled in theart, preferably as III-V group compound semiconductor, such asAl_(x)Ga_(y)In_(1-x-y)N or Al_(x)Ga_(y)In_(1-x-y)P, wherein 0≦x≦1,0≦y≦1, 0≦x+y≦1, and can be doped with P/N type dopants. Light emittinglayer 104 can embodied with conventional materials (e.g.,Al_(x)Ga_(y)In_(1-x-y)N or Al_(x)Ga_(y)In_(1-x-y)P) and structures(e.g., Single Quantum Well, Multiple Quantum Well, and DoubleHeterostructure). The principles and mechanisms of the active layer 104are known to those skilled in the art and thus omitted hereinafter. Inaddition, the light emitting structure 100 can be manufactured via theprocess of MOCVD (Metallic-Organic Chemical Vapor Deposition), molecularbeam epitaxy (MBE), or hydride vapor phase epitaxy (HVPE).

Next, as shown in FIG. 1B, a first dielectric layer 122 is formed on thelight emitting structure 100. Preferably, the first dielectric layer 122is a transparent dielectric layer with the thickness D≦20 μm, and theheat generated from the light emitting structure 100 can be easilyconducted. The first dielectric layer 122 can be formed with thematerial such as SiO₂, Si₃N₄, or the combination of them, and via theprocesses of E-gun or sputter.

As shown in FIG. 1C, a second dielectric layer 140 is formed on thefirst dielectric layer 122. The layer 140 can be formed with thematerial such as SiO₂, silicon nitride, polyimide, bisbenzocyclobutene,or photoresist. Preferably, the thickness of the second dielectric layer140 is about 25 μm, and the second dielectric layer 140 is formed byusing a printing technology.

As shown in FIG. 1D, the metal layer 160 is formed after the seconddielectric layer 140 is formed. The metal layer 160 is disposed on thelight emitting structure 100 and is electrically connected to the firstconductive layer 102. A portion of the metal layer 160 is disposed onthe first dielectric layer 122. Also the metal layer 162 is formed onthe on the light emitting structure 100 and is electrically connected tothe second conductive layer 106. A portion of the metal layer 162 isdisposed on the first dielectric layer 122. Meanwhile, the firstdielectric layer 122 and the second dielectric layer 140 electricallyisolate the metal layer 160 from the metal layer 162. The metal layer160 or the metal layer 162 can be embodied with materials of Au, Al, Ag,or Alloy of them. Preferably, the metal layer 160 and the metal layer162 are formed together by using a printing technology or electroplated.After that, the manufacture process for LED 10 is completed.

In one embodiment, the dielectric layer 122 is a transparent dielectriclayer. A surface of the dielectric layer 122 contacting the metal layer160 and/or the metal layer 162 is provided for reflecting the lightemitted from the light emitting structure 100. Furthermore, the metallayer 160 and/or the metal layer 162 are thermal conductive paths forthe light emitting structure 100. Large contact areas A1 and A2 of themetal layer 160 and the metal layer 162 are also beneficial to the heatdissipation.

Referring to FIG. 1E, after the formation of the structure shown in FIG.1D, the method further includes a step of removing the substrate 11 toexpose the first conductive layer 102. For example, the substrate 11 canbe a sapphire substrate or a GaAs substrate. When the substrate 11 is asapphire substrate, the substrate 11 can be removed by an Excimer laserprocess. The Excimer laser process can be a KrF Excimer laser with anenergy density of 400 mJ/cm², a wavelength of 248 nm, and a pulse widthof 38 ns. As the Excimer laser radiates on the sapphire substrate at anelevated temperature, such as 60° C., the sapphire substrate is removedto expose the first conductive layer 102. Alternatively, when thesubstrate 11 is GaAs substrate, a solution of NH₄OH:35H₂O₂ or a solutionof 5H₃PO4:3H₂O₂:3H₂O can be applied to remove the GaAs substrate toexpose the first conductive layer 102.

After the substrate 11 is removed, the method further includes a step ofroughening the surface 102 a of the first conductive layer 102. Forexample, the first conductive layer 102 can be anAl_(x)Ga_(y)In_(1-x-y)N layer, and the surface 102 a is roughened byusing an etch solution, such as a KOH solution. Alternatively, when thefirst conductive layer 102 is an Al_(x)Ga_(y)In_(1-x-y)P layer, asolution of HCl and H₃PO₄ can be employed for 15 seconds to roughen thesurface 102 a of the first conductive layer 102. The rough surface 102 aof the first conductive layer 102 is implemented to reduce thepossibility of total reflection of light so as to increase a lightextraction efficiency of the light emitting device.

Like the LED 10 in FIG. 1E, LED 10 a, 10 b, and 10 c shown in FIG. 1F,are provided with large contact areas, each of which is preferablylarger than half of the section area of the LED 10. LED 10 a, 10 b, and10 c are directly connected to the circuit board 13 by using solder 12instead of by “Die Bonding” and “Wire Bonding”. In another embodiment,LED 10 a is provided for emitting red light, LED 10 b for emitting greenlight, and LED 10 c for emitting blue light. Thus LED 10 a, 10 b, and 10c, when connected to the circuit boards 13, can be used in the imagedisplay application.

FIGS. 2A-2D illustrate the method for forming a light emitting device(LED) array according to one embodiment of the present disclosure.Referring to FIG. 2A, at first, a substrate 21 is provided. Thesubstrate 21 can be a sapphire substrate, an GaAs substrate, or othersubstrates known to those skilled in the art, or the combinations ofthem. Next, a plurality of light emitting structures 200 a, 200 b, and200 c are formed on the substrate 21. The materials and the manufactureprocesses for light emitting structures 200 a, 200 b, and 200 c can bereferred to the elaboration for light emitting structure 100 illustratedby FIGS. 1A-1D. Similarly, light emitting structures 200 a, 200 b, and200 c can be manufactured via the process of MOCVD, molecular beamepitaxy, or hydride vapor phase epitaxy.

Next, as shown in FIG. 2B, a dielectric layer 222 a is formed on thelight emitting structure 200 a, a dielectric layer 222 b is formed onthe light emitting structure 200 b, and a dielectric layer 222 c isformed on the light emitting structure 200 c. Preferably, like the layer122 shown in FIG. 1B, dielectric layers 222 a, 222 b, and 222 c aretransparent dielectric layers with each thickness D≦20 μm, and the heatgenerated from the light emitting structures 200 a, 200 b, and 200 c canbe easily conducted away. The dielectric layers 222 a, 222 b, and 222 ccan be formed with the material such as SiO₂, Si₃N₄, or the combinationof them, and via the processes of E-gun or sputter.

Later, as shown in FIG. 2C, a dielectric layer 240 a is formed on thedielectric layer 222 a, a dielectric layer 240 b is formed on thedielectric layer 222 b, and a dielectric layer 240 c is formed on thedielectric layer 222 c. The dielectric layers 240 a, 240 b, and 240 ccan be formed with the material such as SiO2, silicon nitride,polyimide, bisbenzocyclobutene, or photoresist. Preferably, like thedielectric layer 140 in FIG. 1C, the thickness of the dielectric layers240 a, 240 b, and 240 c are about 25 μm respectively, and the dielectriclayers 240 a, 240 b, and 240 c are formed by using a printingtechnology. In one embodiment, a dielectric layer 280 is further formedbetween light emitting structures 200 a, 200 b, and 200 c toelectrically isolate LEDs 20 a, 20 b, and 20 c from each other (as shownin FIG. 2D). The dielectric layer 280 can be embodied with the samematerial (e.g., polyimide) with the layer 240 a, 240 b, or 240 c, and isformed together with them by using a printing technology. Alternatively,the dielectric layer 280 can be embodied with the different materialwith the layer 240 a, 240 b, or 240 c, and is formed through a differentprocess.

As shown in FIG. 2D, metal layers 260 a, 260 b, 260 c, 262 a, 262 b, and262 c are formed and can be embodied with materials of Au, Al, Ag, orAlloy of them. Preferably, metal layers 260 a, 260 b, 260 c, 262 a, 262b, and 262 c are formed together by using a printing technology orelectroplated. After that, the manufacture process for LED array 20including LEDs 20 a, 20 b, and 20 c is completed.

As shown in FIG. 2E, LEDs 20 a, 20 b, and 20 c are provided with largecontact areas, and are directly connected to the circuit board 23 byusing solders 22. Thereafter, LED array 20 can be separated from thesubstrate 21 and used in the image display application. For example,after the LEDs 20 a, 20 b, and 20 c are connected to the circuit board23 by using solder 22, the method further includes a step of removingthe substrate 21. For example, the substrate 21 can be a sapphiresubstrate, and be removed by an Excimer laser process. The Excimer laserprocess can be a KrF Excimer laser with an energy density of 400 mJ/cm²,a wavelength of 248 nm, and a pulse width of 38 ns. As the Excimer laserradiates on the sapphire substrate 21 at an elevated temperature, suchas 60° C., the sapphire substrate 21 is removed to expose the firstconductive layer 102. Alternatively, when the substrate 11 is an GaAssubstrate, a solution of NH₄OH:35H₂O₂ or a solution of 5H₃PO4:3H₂O₂:3H₂Ocan be applied to remove the GaAs substrate to expose the firstconductive layer 102.

After the substrate 21 is removed, the method further includes a step ofroughening the surface 102 a of the first conductive layer 102. Forexample, the first conductive layer 102 can be anAl_(x)Ga_(y)In_(1-x-y)N layer, and the surface 102 a is roughened byusing an etch solution, such as a KOH solution. Alternatively, when thefirst conductive layer 102 is an Al_(x)Ga_(y)In_(1-x-y)P layer, asolution of HCl and H₃PO₄ can be employed for 15 seconds to roughen thesurface 102 a of the first conductive layer 102. The rough surface 102 aof the first conductive layer 102 is implemented to reduce thepossibility of total reflection of light so as to increase a lightextraction efficiency of the light emitting device. In anotherembodiment, as shown in FIG. 2G, a transparent encapsulating material24, such as epoxy or any conventional material as appropriate, isapplied to enclose the LED array 20 (including LEDs 20 a, 20 b, and 20c) and connected to the circuit board 23 so that an LED device package25 is formed.

FIGS. 3A-3G illustrate the method for forming a light emitting device(LED) array according to another embodiment of the present disclosure.Referring to FIG. 3A, a substrate 21 is provided. The substrate 21 issingle crystalline and comprises sapphire, GaAs, GaN, or Si. Next, afirst conductive layer 102 as a first cladding layer is epitaxiallygrown on the substrate 21, an active layer 104 comprising multiplequantum well (MQW) Structure as a light emitting layer is epitaxiallygrown on the first conductive layer 102, and a second conductive layer106 as a second cladding layer is epitaxially grown on the active layer104. Next, the first conductive layer 102, the active layer 104, and thesecond conductive layer 106 are etched to form a plurality oflight-emitting stacks 101 separated from each other on the substrate 21,and a portion of the first conductive layer 102 of each light-emittingstack 101 is exposed. Next, a first dielectric layer 120 is formed oneach light-emitting stack 101 and covers a portion of the firstconductive layer 102, a portion of the second conductive layer 106, anda sidewall of the light-emitting stack 101. Next, a first electrode orbonding pad 107 a is disposed on an exposed portion of each firstconductive layer 102 and electrically connected to the first conductivelayer 102, and a second electrode or bonding pad 107 b is disposed oneach second conductive layer 106 and electrically connected to thesecond conductive layer 106.

Then, as shown in FIG. 3B, a reflecting layer 221 is formed on eachfirst dielectric layer 120, and a second dielectric layer 122 is formedon each first dielectric layer 120 and covers the reflecting layer 221.The reflecting layer 221 has a reflectivity equal to or greater than 80%for light emitted by the corresponding light-emitting stack 101. Thematerial of the reflecting layer 221 comprises metal such as Ag, Agalloy, Al, or Al alloy. In one embodiment, the material of thereflecting layer 221 comprises polymer mixed with inorganic particlesmade of metal oxide or a material having a refractive index equal to orgreater than 1.8, such as an epoxy resin mixed with titanium oxideparticles. The reflecting layer 221 is fully enclosed by thecorresponding first dielectric layer 120 and second dielectric layer 122such that the reflecting layer 221 is electrically insulated with thecorresponding light-emitting stack 101. In another embodiment, the firstdielectric layer 120 is omitted, and the reflecting layer 221 isdirectly formed on the second conductive layer 106 and electricallyconnected to the second conductive layer 106. Next, as shown in FIG. 3C,a third dielectric layer 240 is formed on each light-emitting stack 101and the substrate 21 and exposes the corresponding first electrode orbonding pad 107 a and second electrode or boding pad 107 b. Next, afirst metal layer 260 and a second metal layer 262 are formed withineach third dielectric layer 240 and on a portion of the correspondingsecond dielectric layer 122. The first metal layer 260 and the secondmetal layer 262 are respectively formed on the corresponding firstelectrode or bonding pad 107 a and second electrode or bonding pad 107b. The material of the first metal layer 260 and the second metal layer262 comprise Au, Al, Ag, or the Alloy thereof In one embodiment, thefirst metal layer 260 and the second metal layer 262 are formed togetherby using a printing process or an electroplating process.

As shown in FIG. 3D, the third dielectric layer 240 between adjacent twolight-emitting stacks 101 is further patterned to form cavities in thethird dielectric layer 240 and expose a portion of the substrate 21,then an opaque layer 290 is formed in the cavities. In one embodiment,the opaque layer 290 serves as an reflecting layer or a light-absorptionlayer for reflecting or absorbing light emitted from the correspondinglight-emitting stack 101 and preventing the light emitted fromneighboring light-emitting stacks 101 from mutually interfering orcrosstalk. The opaque layer 290 has a transmittance less than 50% forlight emitted by the corresponding light-emitting stack 101. Thematerial of the opaque layer 290 comprises metal or comprises a polymermixing with inorganic particles made of metal oxide or a material havinga refractive index equal to or greater than 1.8, such as an epoxy resinmixing with titanium oxide particles. Therefore, the manufacture processfor LED array 30 comprising a plurality of LEDs 300 is completed.

As shown in FIG. 3E, a circuit board 23 is provided. the circuit board23 comprises a plurality of metal contacts 22 formed on the uppersurface and the lower surface of the circuit board 23 and a plurality ofconductive channels 22 a penetrating the circuit board 23 for connectingthe metal contacts 22 on the upper surface of the circuit board 23 tothe metal contacts 22 on the lower surface of the circuit board 23. Themetal contacts 22 comprises metal or metal alloy. In one embodiment, themetal contacts 22 comprise solders. The circuit board 23 comprises FR-4,BT (Bismaleimide-Triazine) resin, ceramics or glass. The thickness ofthe circuit board 23 is between 50 and 200 microns for being sufficientto support LEDs but still compact. The LED array 30 is directlyflip-bonded to the circuit board 23 by aligning the first metal layer260 and the second metal layer 262 of each LEDs 300 to the correspondingmetal contacts 22. It is noted that air gaps may be formed between theLED array 30 and the circuit board 23 other than the area of metalcontacts 22. Optionally, an underfill material is filled in the gaps toenhance the bonding strength and mechanical support. Thereafter, thesubstrate 21 of the LED array 30 is removed after the LED array 30 isconnected to the circuit board 23. In one embodiment, the substrate 21comprises sapphire, the light-emitting stacks 101 comprises galliumnitride, and the method for removing the substrate 21 comprises using anExcimer laser to radiate at the interface of the first conductive layers102 and the substrate 21 under an environment with an elevatedtemperature, such as 60° C., and then the substrate 21 is separated fromthe first conductive layers 102. The Excimer laser comprises a KrFExcimer laser with an energy density of 400 mJ/cm², a wavelength of 248nm, and a pulse width of 38 ns. In another embodiment, the substrate 21comprises GaAs, and the method for removing the substrate 21 comprisesusing a chemical solution with a composition of NH₄OH:35H₂O₂ or acomposition of 5H₃PO4:3H₂O₂:3H₂O to totally etch away the substrate 21and then expose the first conductive layers 102, the third dielectriclayers 240 a, and the opaque layers 290.

As shown in FIG. 3F, after the substrate 21 is removed, the methodfurther includes a step of roughening the exposed surface of the firstconductive layers 102. In one embodiment, the first conductive layers102 comprises Al_(x)Ga_(y)In_(1-x-y)N (0≦x, y≦0), and the exposedsurfaces of the first conductive layers 102 are etched by KOH solutionto form a rough surface 102 a on each first conductive layer 102. Inanother embodiment, the first conductive layers 102 compriseAl_(x)Ga_(y)In_(1-x-y)P (0≦x, y≦0), and the exposed surfaces of thefirst conductive layers 102 are etched by HCl solution or H₃PO₄ solutionfor 15 seconds to form a rough surface 102 a on each first conductivelayer 102. The rough surface 102 a of each first conductive layer 102can reduce the possibility of total internal reflection (TIR) of lightwithin each LED 300 so as to increase light extraction efficiency of thedevice. After the roughening step, a plurality of concave regions isformed on the rough surface 102 a and substantially enclosed by thethird dielectric layers 240 a. In one embodiment, in order to form achip-scale RGB LED unit for a display, the method further includesselectively coating a first wavelength converting layer 294 on the LED300 b, as shown in FIG. 3F, for converting light. For example, bluelight having a dominant wavelength between 430 nm and 470 nm, emitted bythe light-emitting stack 101 of LED 300 b is converted into a firstconverted light, e.g. red light having a dominant wavelength between 610nm and 690 nm. A second wavelength converting layer 296 is furtherselectively coated on the LED 300 c for converting the light emittedfrom the light-emitting stack 101 of LED 300 c into a second convertedlight, e.g. a green light having a dominant wavelength between 500 nmand 570 nm. LED 300 a is not coated with any wavelength convertingmaterial for emitting the blue light directly exited from the roughsurface 102 a of LED 300 a. In one embodiment, the first or secondwavelength converting layers are in a form of a sheet by aggregatingnano-scale quantum dots or nano-scale phosphor particles with asubstantially uniform thickness and bonded to the light-emitting stack101 by an adhesive bonding layer (not shown). In another embodiment, thefirst or second wavelength converting layers comprise nano-scale quantumdots or nano-scale phosphor particles having an average diameter oraverage feature length between 10 nm and 500 nm. The diameter or featurelength of each of the nano-scale quantum dots or nano-scale phosphorparticles is substantially lower than 1000 nm. The nano-scale quantumdots comprises semiconductor material, such as a group II-VI materialhaving a composition of Zn_(x)Cd_(y)Mg_(1-x-y)Se where x and y aredetermined such that the group II-VI material is capable of beingoptically pumped to emit green or red light. The term “feature length”is defined as the maximum length between any two points of a phosphorparticle or quantum dot. After that, a transparent encapsulatingmaterial 24, such as epoxy or silicone is applied to the upper surfaceof the LED array 32 for affixing the wavelength converting materials tothe light-emitting stacks 101 and serving as optical lens for LEDs 300a, 300 b, 300 c of the LED array 32. In another embodiment, the materialof the wavelength converting layer that covers on the LEDs is the same,

FIG. 4A shows a top view of the LED array 32 flip-bonded to the circuitboard 23 of FIG. 3F. The LED array 32 and the circuit board 23 are bothin a wafer form with same or similar dimension. The LED array 32comprises a plurality of RGB LED groups arranged alternately andsequentially in two dimensions, and each group comprises one LED 300 a,one LED 300 b, and one LED 300 c as enclosed by the dashed lines.

Finally, a dicing step is performed to cut the LED array 32 and thecircuit board 23 simultaneously to form a plurality of chip-scale RGBLED units 35 as shown in FIG. 3G, each having one RGB LED groupincluding an LED 300 a (blue LED) configured to emitting blue light, anLED 300 b (red LED) configured to emitting red light, and an LED 300 c(green LED) configured to emitting green light. The chip-scale RGB LEDunit 35 is a package-free and surface-mounted device and is configuredto be directly mounted to a printed circuited board (PCB) withoutfurther traditional packaging process after the dicing step. Thetransparent encapsulating material 24 commonly covers LEDs 300 a, 300 b,and 300 c without extending to sidewalls of the light-emitting stacks ofLEDs 300 a, 300 b, and 300 c. In one embodiment, the dicing step isperformed to cut the LED array 32 and the circuit board 23simultaneously to form a plurality of chip-scale RGB LED units whereineach of the chip-scale RGB LED units comprises a plurality of RGB LEDgroups. The plurality of RGB LED groups in one chip-scale RGB LED unitis arranged as I×J array, wherein I and J are positive integers, and atleast one of I and J are greater than 1. The I/J ratio is preferablyapproximately or equal to 1/1, 3/2, 4/3, or 16/9.

FIG. 4B shows the top view of the chip-scale RGB LED unit 35 comprisingone RGB LED group in FIG. 3G. The chip-scale RGB LED unit 35 is shapedas a first rectangle with a first short side and a first lengthy side,wherein the first short side has a first width S1 and the first lengthyside has a first length S2 greater than the first width S1. Each oflight-emitting stacks 101 is shaped as a second rectangle with a secondshort side and a second lengthy side, wherein the second short side hasa second width d1 and the second lengthy side has a second length d2greater than the second width d1. Light-emitting stacks 101 are arrangedsuch that the second short sides of the light-emitting stacks 101 aresubstantially parallel to the first lengthy side of the chip-scale RGBLED unit 35 or substantially perpendicular to the first short side ofthe chip-scale RGB LED unit 35. In one embodiment, the chip-scale RGBLED unit 35 is used as one pixel of an indoor display panel. To realizefull LED pixel in an TV display with 40 inches diagonal and 1024*768pixel resolution, the area of each pixel has to be smaller thanapproximately 0.64 mm². Therefore, the area of the chip-scale RGB LEDunit 35 is exemplarily smaller than 0.36 mm². The first length S2 andthe first width s1 are both smaller than 0.6 mm, and the aspect ratio ofthe chip-scale RGB LED unit 35, i.e. S2/S1 is preferably smaller than2/1. The distance between two metal layers 260 and 262, i.e. the firstdistance S3, is limited to the alignment control of the bonding processbetween the LED array and the circuit board in accordance with thepresent disclosure. The first distance S3 is equal to or greater than 25microns to ensure the process tolerance, but smaller than 150 microns toprovide sufficient contact area for electrical conduction. The distancebetween one edge of the chip-scale RGB LED unit 35 and onelight-emitting stack 101 therein, i.e. the second distance S4, islimited to the tolerance of the dicing step. The second distance S4 isequal to or greater than 25 microns to ensure the dicing tolerance, butsmaller than 60 microns to maintain the compactness. The distancebetween two adjacent LEDs, i.e. the third distance S5 is limited by thelithography-etching process, and is smaller than 50 microns, orpreferably smaller than 25 microns for reserving more area for thelight-emitting stacks. For each light-emitting stacks 101 in achip-scale RGB LED unit 35, the second width d1 is between 20 and 150microns and the second length d2 is between 20 and 550 microns. Theratio of the area of the chip-scale RGB LED unit 35 to the total area ofthe light-emitting stacks 101is smaller than 2 or between 1.1 and 2, andpreferably between 1.2 and 1.8. The area of the light-emitting stackdepends on the required illumination and the pixel dimension. It isnoted that the shape of the chip-scale RGB LED unit 35 can also besquare with four sides being the same as the first width S1. Similarly,the shape of the light-emitting stack 101 can also be square with foursides being the same as the second width d1. In one embodiment, thereare two chip-scale RGB LED units 35 included in one pixel, and one isfor normal operation and the other one is for redundancy in case the onefor normal operation is malfunctioned. The first width S1 is preferablyless than 0.3 mm in order to arrange two chip-scale RGB LED units 35included in one pixel. By taking the advantage of the presentdisclosure, using LEDs as pixel elements in a flat TV can be realized,and the resolution can be further enhanced to double or quadruple of1024*768 pixel resolution. In another embodiment, one chip-scale RGB LEDunit comprises two RGB LED groups; one for normal operation and theother one for redundancy in case the one for normal operation ismalfunctioned.

FIGS. 5A-5C show one embodiment for a chip-scale LED unit in accordancewith the present disclosure. The manufacturing method and structure issimilar to the foregoing embodiment depicted in FIGS. 3A-3G and therelated disclosure. The difference is that, before the dicing step, theLED array 34 comprises a plurality of identical LEDs 300 d as shown inFIG. 5A. Each LED 300 d is coated with an identical or differentwavelength converting layer 298 for converting light emitted by thelight-emitting stack 101 of the corresponding LED 300 d, e.g. blue lighthaving a dominant wavelength between 430 nm and 470 nm, into a convertedlight, e.g. yellow light, green light, or red light. FIG. 5B and FIG. 5Cshow the top view and the cross-sectional view of the chip-scale LEDunit 36 containing one singular LED after the dicing step. The dimensionof the chip-scale LED unit 36 is the same or similar to that in FIG. 4B.The chip-scale RGB LED unit 36 is shaped as a first rectangle with afirst short side and a first lengthy side, wherein the first lengthyside has a first length S1 and the first short side has a first width S6smaller than the first length S1. Each of light-emitting stacks 101 isshaped as a second rectangle with a second short side and a secondlengthy side, wherein the second short side has a second width d1 andthe second lengthy side has a second length d2 greater than the secondwidth d1. Light-emitting stacks 101 is arranged such that the secondshort side of the light-emitting stack 101 is substantially parallel tothe first short side of the chip-scale RGB LED unit 36 or substantiallyperpendicular to the first lengthy side of the chip-scale RGB LED unit36. In one embodiment, the chip-scale RGB LED unit 36 is used as part ofa pixel of an indoor display panel. The area of the chip-scale RGB LEDunit 36 is exemplarily smaller than 0.12 mm². The first length S1 andthe first width S6 are both smaller than 0.2 mm, and the aspect ratio ofthe chip-scale RGB LED unit 36, i.e. S1/S6 is preferably smaller than2/1. The distance between two metal layers 260 and 262, i.e. the firstdistance S3, is limited to the alignment control of the bonding processbetween the LED array and the circuit board in accordance with thepresent disclosure. The first distance S3 is equal to or greater than 25microns to ensure the process tolerance, but smaller than 150 microns toprovide sufficient contact area for electrical conduction. The distancebetween one edge of the chip-scale RGB LED unit 36 and thelight-emitting stack 101 therein, i.e. the second distance S4, islimited to the tolerance of the dicing step. The second distance S4 isequal to or greater than 25 microns to ensure the dicing tolerance, butsmaller than 60 microns to maintain the compactness. For thelight-emitting stack 101 in a chip-scale RGB LED units 36, the secondwidth d1 is between 20 and 150 microns and the second length d2 isbetween 20 and 550 microns. The ratio of the area of the chip-scale RGBLED unit 35 to the total area of the light-emitting stack 101 is smallerthan 2 or between 1.1 and 2, and preferably between 1.2 and 1.8. Thearea of the light-emitting stack depends on the required illuminationand the pixel dimension. It is noted that the shape of the chip-scaleRGB LED units 36 can also be square with four sides being the same asthe first width S6. Similarly, the shape of the light-emitting stack 101can also be square with four sides being the same as the second widthd1. In one embodiment, there are at least three chip-scale RGB LED units36 included in one pixel for illuminating blue, red, and green light.

FIGS. 5D-5E show another embodiment for a chip-scale LED unit inaccordance with another embodiment of the present disclosure. Themanufacturing method and structure is similar to the foregoingembodiment depicted in FIGS. 5A-5C and the related disclosure. Thedifference is that the opaque layer 290 is optionally omitted. Thechip-scale LED unit 36′ is directly surface-mounted to a lighting boardcontained in a lighting fixture. The area of the light-emitting stack101 depends on the required illumination and the dimension of thelighting board or the lighting fixture. The area of the light-emittingstack 101 within the chip-scale LED unit 36′ is exemplarily from 100mil² to 200 mil² for low power application (e.g. below 0.3 watts), 201mil² to 900 mil² for middle power application (e.g. 0.3-0.9 watts), orgreater than 900 mil² for high power application (e.g. above 0.9 watts).The dielectric layer 240 a surrounding the light-emitting stack 101 isserved as a coupling lens for extracting light out of the chip-scale LEDunit 36′. The ratio of the area of the chip-scale LED unit 36′ to thearea of the light-emitting stack 101 is equal to or greater than 9, andpreferably equal to or greater than 15 for better light extractionefficiency and light dispersion. The distance between two metal layers260 and 262, i.e. the first distance S3′, is limited to the alignmentcontrol of the bonding process between the LED array and the circuitboard in accordance with the present disclosure. The first distance S3′is equal to or greater than 25 microns to ensure the process tolerance,but smaller than 150 microns to provide sufficient contact area forelectrically conducting. It is noted that the shape of the chip-scaleLED unit 36 can also be square with the length of four sides being thesame as the first width S6′. Similarly, the shape of the light-emittingstack 101 can also be square with the length of four sides being thesame as the second width d1′. The first width S6′ is equal to or greaterthan 3 times of the second width d1′, or preferably equal to or greaterthan 4 times of the second width d1′ for better light extractionefficiency. In one embodiment, the dielectric layer 240 a has asymmetricthickness on the sidewalls of the light-emitting stack 101 such that afirst ratio of the first width S6′ to the second width d1′ is differentfrom a second ratio of the first length S1′ to the second length d2′ toachieve an asymmetric light field under operation when viewing from thetop of the chip-scale LED unit 36′. The first ratio is at least 2 timesof the second ratio, or preferably 4 times of the second ratio.

FIG. 6A shows another embodiment of a chip-scale RGB LED unit inaccordance with another embodiment of the present disclosure. Themanufacturing method and structure of the chip-scale RGB LED unit 65 issimilar to the foregoing embodiment depicted in FIGS. 3A-3G and therelated disclosure. The difference is that an underfill material 680 isfilled in the gaps between the LED array 32′ and the circuit board 23 toenhance the bonding strength and provide a current path between thecircuit board 23 and the LEDs. The underfill material 680 comprises ananisotropic conductive film (ACF) that is capable of conducting currentin a vertical path between the LED array 32′ and the circuit board 23,and isolating current in a lateral path parallel to the LED array 32′ orthe circuit board 23. The underfill material 680 is coated on thecircuit board 23 prior to bonding the LED array to the circuit board 23.In one embodiment, the first metal layers 260′ and the second metallayers 262′ does not contact with the metal contacts 22 of the circuitboard 23. The underfill material 680 is between the metal layers and themetal contacts for conducting current between the metal layers and themetal contacts. The metal layers are patterned to form a plurality ofdepressions and protrusions on the surface facing the metal contacts.Therefore, the contacting surface area is increased and the bondingstrength is enhanced. The plurality of depressions and protrusions is ina regular form or an irregular form, and the surface roughness Ra isbetween 0.5 and 5 microns. The benefit for using ACF as an underfillmaterial is that the distance between two metal layers 260′ and 262′,i.e. the first distance S3 as shown in FIG. 4B, can be lower than 25microns.

Similarly, FIG. 6B is a singular form of FIG. 6A. The underfill material680 and the patterned surface of the metal layers 260′ and 262′ can bealso applied to the foregoing embodiment depicted in FIGS. 5A-5C to formthe structure demonstrated in FIG. 6B. The underfill material 680 isfilled in the gaps between the LED 300 d and the circuit board 23 toenhance the bonding strength and provide a current path. The underfillmaterial 680 comprises an anisotropic conductive film (ACF) that iscapable of conducting current in a vertical path between the LED 300 dand the circuit board 23, and isolating current in a lateral pathparallel to the LED 300 d or the circuit board 23. The underfillmaterial 680 is coated on the circuit board 23 prior to bonding the LEDarray to the circuit board 23. In one embodiment, the first metal layers260′ and the second metal layers 262′ does not contact with the metalcontacts 22 of the circuit board 23. The underfill material 680 isbetween the metal layers 260′ and 262′ and the metal contacts 22 forconducting current between the metal layers 260′ and 262′ and the metalcontacts 22. The metal layers 260′ and 262′ are patterned to form aplurality of depressions and protrusions on the surface facing the metalcontacts 22. Therefore, the contact surface area is increased and thebonding strength is enhanced. The plurality of depressions andprotrusions is in a regular form or an irregular form, and the surfaceroughness Ra is between 0.5 and 5 microns. Similarly, the underfillmaterial 680 and the patterned surface of the metal layers 260′ and 262′can also be applied to the foregoing embodiment of FIG. 5E to form thestructure demonstrated in FIG. 6C.

FIG. 7A shows a display module 76 comprises a plurality of chip-scaleRGB LED units 65 on a second circuit board 73. The configuration of thechip-scale RGB LED units 65 depends on the pixel size of the displaymodule. For example, any two adjacent chip-scale RGB LED units 65 areeither separated from each other by a distance or disposed seamlesslysuch that they are contacted with each other. The second circuit boardcomprises circuitry 72 electrically connected to LEDs of the chip-scaleRGB LED units 65 for independently controlling the blue, red, and greenLEDs in each chip-scale RGB LED unit 65. In one embodiment, the displaymodule 76 contains M rows and N columns of the chip-scale RGB LED units65 for being used in an display with X*Y pixel resolution, wherein M IN=1/1, 3/2, 4/3 or 16/9; X=a*M, Y=b*N, and a, and b are all positiveintegers equal to or greater than 2. The display module 76 contains over500 units of chip-scale RGB LED units 65 in an area of one inch square.Namely, the display module 76 contains over 1500 light-emitting stacks101 in an area of one inch square. In another embodiment, eachchip-scale RGB LED unit comprises a plurality of RGB LED groups and eachgroup comprises one blue LED, one red LED, and one green LED as depictedin the foregoing embodiments. The plurality of RGB LED groups in onechip-scale RGB LED unit is arranged as I×J array, wherein I and J arepositive integers, and at least one of I and J are greater than 1. Theratio of I/J is preferably approximately or equal to 1/1, 3/2, 4/3 or16/9. The distance between two adjacent light-emitting stacks from twoadjacent RGB LED groups in one chip-scale RGB LED unit is substantiallythe same as the distance between two adjacent light-emitting stacks fromtwo adjacent chip-scale RGB LED units. The display module 76 contains Mrows and N columns of the chip-scale RGB LED units 65 for being used inan display with X*Y pixel resolution, wherein M/N=1/1, 3/2, 4/3 or 16/9;X=a*M*I, Y=b*N*J, and a, and b are all positive integers equal to orgreater than 2. The display module 76 contains over 500 units of RGB LEDgroups in an area of one inch square. Namely, the display module 76contains over 1500 light-emitting stacks 101 in an area of one inchsquare. Each of the LEDs in the RGB LED units and each of the RGB LEDunits can be independently driven by the circuitry formed on the circuitboard 23 and the second circuit board 73. The material of the secondcircuit board 73 comprises FR-4, BT (Bismaleimide-Triazine) resin,ceramics or glass.

FIG. 7B shows a lighting module 78 comprising a plurality of chip-scaleLED units 66 on a second circuit board 73. The chip-scale LED units 66can be connected in series or parallel by the circuit of the secondcircuit board 73 depending on the driving voltage to be applied. In oneembodiment, the lighting module 78 is installed into a lighting bulb 80as shown in FIG. 8. The lighting bulb further comprises an optical lens82 covering the lighting module 78, a heat sink 85 having a mountingsurface where the lighting module 78 formed thereon, a frame 87connected to heat sink, and an electrical connector 88 connected to theframe and electrically connected to lighting module.

Although specific embodiments have been illustrated and described, itwill be obvious to those skilled in the art that various modificationsmay be made without departing from what is intended to be limited solelyby the appended claims.

What is claimed is:
 1. A method for forming a light-emitting apparatus,comprising: providing a first board having a plurality of first metalcontacts; providing a substrate; forming a plurality of light-emittingstacks and trenches on the substrate, wherein the light-emitting stacksare apart from each other by the plurality of the trenches; bonding thelight-emitting stacks to the first board: forming an encapsulatingmaterial commonly on the plurality of the light-emitting stacks; andcutting the first board and the encapsulating material to form aplurality of chip--scale LED units.
 2. The method of claim 1, furthercomprising removing the substrate before forming the encapsulatingmaterial.
 3. The method of claim 1, further comprising forming aplurality of metal layers on the light-emitting stacks for bonding tothe first metal contacts.
 4. The method of claim 1, further comprisingforming an opaque layer in the trench and enclosing the light-emittingstacks for preventing the light emitted from neighboring light-emittingstacks from mutually interfering or crosstalk.
 5. The method of claim 1,further comprising selectively forming a first wavelength convertingmaterial on a first light-emitting stack and configured to convert thelight emitted from the first light-emitting stack to a first light,wherein the first light-emitting stack is one of the plurality oflight-emitting stacks.
 6. The method of claim 5, further comprisingselectively forming a second wavelength converting material on a secondlight-emitting stack and configured to convert the light emitted fromthe second light-emitting stack to a second light, wherein the secondlight-emitting stack is one of the plurality of light-emitting stacks.7. The method of claim 6, wherein the plurality of light-emitting stackscomprise a third light-emitting stack devoid of any wavelengthconverting material formed thereon, wherein the light emitted from thefirst, second, and third light-emitting stacks is a blue light, andwherein the first light is a green light, and the second light is a redlight.
 8. The method of claim 1, further comprising an opaque layerformed in the trenches, wherein the encapsulating material is on thetrench and the opaque layer.
 9. The method of claim 6, furthercomprising forming a dielectric layer in the trench and between theopaque layer and the light-emitting stacks.
 10. The method of claim 3,further comprising patterning the metal layers to form an uneven surfaceon the metal layers.
 11. The method of claim 1, further comprisingremoving the substrate to expose an exposed surface of thelight-emitting stacks after bonding the light-emitting stacks to thefirst board and roughening the exposed surface of the light-emittingstacks.
 12. The method of claim 1, further comprising forming areflecting layer between the light-emitting stacks and the first board.13. The method of claim 1, further comprising forming an underfillmaterial substantially over the surface of the first board beforebonding the light-emitting stacks to the first metal contacts.
 14. Themethod of claim 13, wherein the underfill material is electricallyconductive, and the light-emitting stacks is electrically connected withthe first board through the underfill material.
 15. The method of claim1, wherein the first metal contacts extend from a top surface of thefirst board to a bottom surface of the first board.
 16. The method ofclaim 1, further comprising providing a second board having a pluralityof second metal contacts, and bonding the plurality of chip-scale LEDunits to the second metal contacts of the second board.
 17. The methodof claim 1, wherein the light-emitting stacks are apart from each otherby a distance less than 25 microns.
 18. The method of claim 1, whereinone of the chip-scale LED units has an area less than 0.36 mm².
 19. Themethod of claim 1, wherein one of the chip-scale LED units comprisessingle light-emitting stack, and the ratio of the area of the chip-scaleLED unit to the area of the light-emitting stack is equal to or greaterthan
 9. 20. The method of claim 1, wherein one of the chip-scale LEDunits comprises a plurality of light-emitting stacks, and the ratio ofthe area of the chip-scale LED unit to the total area of thelight-emitting stacks is smaller than 2.